[Om-announce] Deadline for HLDVT early registration closes May 17

[Shireesh Verma]

IEEE International High Level Design Validation and Test Workshop 2010



*June11-12, 2010*

*Anaheim Convention Center (co-located with DAC2010)*

Register at http://www.hldvt.com/10/registration.html by May* 17* to receive
discounted registration rates. Also book your hotel room at discounted rates
by May *20**.*



For the past 14 years, IEEE International High Level Design Validation and
Test Workshop has been a platform for addressing emerging challenges in
verification and test methodologies for ICs and systems. The workshop is an
informal forum where EDA tool developers, academics, and industrial
practitioners get together to discuss contemporary issues in verification,
debug, synthesis, and test.

 *This year's program will feature….*

·    Five Regular Sessions

·    Panel: *Clock Domain Verification Challenges: What experts say?*

·    Tutorial: Concise, precise and powerful: IEEE 1800-2009 SystemVerilog
Assertions

·    5 Special Sessions:

**
*

·      Hardware Dependent Software Validation

·      Firmware Validation

·      Accelerators and Emulators

·      Transaction Level Modeling

·      Verification Challenges at ESL


*

*Helpful Links:*

Advance Program: http://www.hldvt.com/10/program.pdf

Hotel Information:   http://www.hldvt.com/10/local.html
Home Page:           http://www.hldvt.com/10/index.html
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://openmath.org/pipermail/om-announce/attachments/20100515/9ee27678/attachment.htm